Samsung Foundry has certified full flow tools from Cadence and Synopsys for its 5LPE (5 nm low-power early) process technology that uses extreme ultraviolet lithography (EUV). Full flow design tools are required by chip developers to create efficient and predictable chip designs for advanced nodes quickly.
Samsung Foundry certified the Synopsys Fusion Design Platform as well as the Cadence Full-Flow Digital Solution full-flow design tools for its 5LPE technology using the Arm Cortex-A53 and Arm Cortex-A57 cores. The certification means that these sets of tools meet Samsung Foundry’s requirements and that by using them chip designers can attain optimal power, performance and area (PPA) benefits that 5LPE technology promises to offer.
Samsung’s 5LPE technology relies on FinFET transistors with a new standard cell architecture and uses both DUV and EUV step-and-scan systems. The new fabrication process enables chip designers to reuse 7LPP IP on ICs designed for 5LPE while enjoying all benefits the latter provides. When compared to 7LPP, the new technology has an up to 25% higher ‘logic efficiency’, it also enables chip developers to reduce power consumption of their designs by 20% or improve their performance by 10%.
The set of tools from Candence and Synopsys that is certified by Samsung includes compilers, validators, power circuit optimizers as well as EUV-specific tools.
Since Samsung’s 5LPE uses more EUV layers than the company’s 7LPP process, expect it to be used on Samsung’s upcoming EUV fab in Hwaseong. The production line is set to cost 6 trillion Korean Won ($4.615 billion), it is expected to be completed in 2019, and start high volume manufacturing in 2020.
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